Publications

Systolic Arrays and Structured Pruning Co-design for Efficient Transformers in Edge Systems

Great Lakes Symposium on VLSI (GLSVLSI) 2025 — Link to paper

P. Palacios, R. Medina, J.L. Rouas, G. Ansaloni and D. Atienza

Structured Pruning for Efficient Systolic Array Accelerated Cascade Speech-to-Text Translation

Interspeech 2025 — Link to paper

J.L. Rouas, C. Brazier, L. B. Letaifa, R. Medina, P. Palacios, D. Atienza, G. Ansaloni

A Real-Time FPGA Implementation of the LCMV Algorithm for Target Classification in Hyperspectral Images Using LDL Decomposition

IEEE Transactions on Geoscience and Remote Sensing (TGRS) 2024 — Link to paper

P. Palacios, D. Báscones, C. González and D. Mozos

Workshop Papers

Performance-Driven Composite Prefetching with Bandits

Data Prefetching Championship (DPC4) at HPCA 2026

C. Block, P. Palacios, A. Farrell, G. Gerogiannis, J. Torrellas

Full Stack Framework for Architectural Exploration of IGZO-Based Compute-near-DRAM

IMEC Partners Technical Week (PTW) 2025

P. Palacios, J. Klein, A. Sharma, D. Abdi, G. Ansaloni, F. Garcia, D. Biswas, D. Atienza, J. Myers

HEEPstor: an Open-Hardware Co-design Framework for Quantized Machine Learning at the Edge

Open-Source Hardware Workshop at ACM Computing Frontiers (CF) 2025

P. Palacios, R. Medina, G. Ansaloni, D. Atienza